Principal Product Test Engineer

About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

What You Can Expect

As a Principal Engineer at Marvell, you are recognized as a technical expert/leader. In joining the ODSP Product Engineering team, you become a key stakeholder and decision-maker for the projects you are entrusted to lead to MPR with high quality and ROI. You are also a key contributor, providing technical input and analysis, in the development of team/company objectives and initiatives.

In this role you will

• Be the Operations lead on Marvell's next generation Optical DSP products and drive the overall productization of these products.

• Build innovative test methodologies to meet the DFx requirements and provide feedback to the cross functional teams based on the findings.

• Collaborate with Design, Test, Foundry and Reliability Engineering to drive NPI DFM to meet product quality, cost and manufacturing requirements.

• Characterize NPI product performances and yield including bench correlation to meet product cost targets.

• Manage the end-to-end product lifecycle : from pre-design to High Volume Manufacturing

• Lead continuous improvement process (CIP) efforts to meet the overall product health : yield, test coverage, cost etc.

• Provide cost analysis and project cost based on design, process, package, test and business requirements

• Develop and maintain bench setups and work on bench bring up / test activities for new products to enable correlation on ATE to improve yield and close the Dppm gap

• Work with HVM PE on yield improvement and test time reduction activities to meet product cost targets

• Provide product engineering support to customer returns of KGDs working laterally with Quality, Design and Test Engineering in a timely manner

What We're Looking For

• B.S. in Electronics/Electrical Engineering or related field. M.S. preferred.

• 10+ years of experience in the semiconductor industry.
  Minimum 4 years of semiconductor manufacturing in 7nm technology node and below.

• Demonstrable knowledge of yield analysis, quality management tools, GR&R, Cp, Cpk. Experience with complex data analysis using Silicon-dash, JMP, PDF, Dataconductor or other semiconductor yield tools

• Hands on experience with silicon bring up, test debug, data analysis and characterization

• Deep understanding of semiconductor processes, wafer probe and package assembly knowledge to drive product yield and performance

• Experiences in solving product manufacturing issues related to Fab process, Wafer sort, Package test and Package assembly.

• Working knowledge of test development, foundry processes and statistics

• Familiarity with 93K ATE and test/bench equipment like Scopes, DSOs, BERT etc.

• Working knowledge and experience with Known Good Die probing at highspeed is a plus

• Strong communication and inter personal skills

Expected Base Pay Range (USD)

The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.